1. Field of the Invention
The present invention relates generally to a semiconductor device and, more particularly, to a semiconductor device having improved metal line structure and a manufacturing method therefor.
2. Description of the Related Art
As semiconductor devices, particularly logic devices, have become more highly integrated and operate at higher speeds, the design rule has decreased to 0.25 microns or less. Accordingly, the width of metal lines and the spacing or interval between metal lines on the semiconductor devices have become narrower. However, with a decrease in the width of the metal line, the resistance of the metal line increases, and with a reduction in the spacing or interval between metal lines, the parasitic capacitance between the metal lines increases. Such an increase in resistance or parasitic capacitance can significantly reduce the speed of a semiconductor device, especially in a logic device.
In order to suppress an increase in capacitance between the metal lines, a dielectric material having a low dielectric constant k is required to be used as an interlayered dielectric material or an intermetallic dielectric material. There are two basic types of dielectric materials having a low dielectric constant k: an organic material and an inorganic material. Silicon oxyfluoride (SiOF) is an example of an inorganic material that exhibits a low dielectric constant. This material may be formed by a high density plasma process or other processes.
FIGS. 1 and 2 are cross-sectional views for illustrating the problems and shortcomings of a conventional metal line structure.
Referring to FIG. 1, when a SiOF film is used as a dielectric film 40 covering an anti-reflection layer 35 and a metal film pattern 31 formed on a semiconductor dielectric electric layer 20 and a substrate 10, the metal film pattern 31 is subject to attack by a harmful or reactive material, such as fluorine, contained in the dielectric film 40, resulting in the generation of a damage film 37. More specifically, a harmful material or reactive material, such as fluorine, diffuses to the metal film pattern 31 and reacts with metal elements in the metal film pattern 31 to form the damage film 37. As a product of such a reaction, the damage film 37 is formed of a metal fluoride, a highly resistive material. The formation of the damage film 37 may therefore cause an increase in the resistance of the metal film pattern 31, thereby degrading the reliability of the metal line and causing a failure of the semiconductor device.
Meanwhile, damage to the metal film pattern 31 as described above may also occur in a metal line fabrication process including a process for forming a via contact plug, etc. Referring to FIG. 2, when an upper metal film 55 to be connected to a lower metal film pattern 31 is formed, the lower metal film pattern 31 may be damaged by a source gas which is used to form the upper metal film 55 or by a reactive material produced by the source gas, thereby producing a damage film 39 on the lower metal film pattern 31.
For example, when the upper metal film 55 is a tungsten film, the tungsten film is formed from a reactive gas including source gases such as tungsten hexafluoride (WF.sub.6). A contact hole exposing the lower metal film pattern 31 is formed by selectively etching the first and second dielectric films 40 and 45. Since semiconductor devices are highly integrated, it is difficult to accurately align the contact holes with respect to the lower metal film pattern 31 when the contact holes are formed. In particular, when via contact holes are formed in a logic device, misalignment may occur due to a very small edge portion. Accordingly, a sidewall surface of the lower metal film pattern 31 is generally exposed together with the upper surface of the lower metal film pattern 31.
The upper portion of the lower metal film pattern 31 and the bottom surface of the contact hole form a recess (A) because of the misalignment. Because the recess (A) has a significant high aspect ratio, the step coverage of a glue layer 51 is weakened. This degradation in the step coverage may generate a step coverage failure so that the sidewall surface of the lower metal film pattern 31 may be exposed.
The exposed sidewall surface of the lower metal film pattern 31 contacts a source gas such as a tungsten hexafluoride gas introduced when the upper metal film 55 is formed, or a reactive material such as fluorine produced by the source gas. The reactive material, e.g., fluorine, is diffused into the lower metal film pattern 31, and reacts with the metal of the lower metal film pattern 31, thus forming a highly resistive material 39 such as a metal fluoride. Therefore, a resistance failure may occur in which the resistance of the lower metal film increases or the contact resistance between the upper metal film 55 and the lower metal film pattern 31 increases, resulting in a failure of the semiconductor device.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.